darklife/darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
272 best points · 113 comments · 2 Hacker News posts · 2,637 GitHub stars · View on GitHub
Hacker News discussions
- Open source RISC-V implemented from scratch in one night (272 points, 109 comments, by guigg, 2018-08-27)
- Opensouce RISC-V CPU core implemented in Verilog from scratch in one night (4 points, 4 comments, by mococa, 2025-03-16)