dawsonjon/Chips-2.0

FPGA Design Suite based on C to Verilog design flow.

63 best points · 27 comments · 1 Hacker News post · 250 GitHub stars · View on GitHub

Hacker News discussions

• Chip 2.0: High Level C to Verilog with Python Bindings (63 points, 27 comments, by Immortalin, 2018-05-11)